| TECHNICAL SPECIFICATIONS |
| Counter |
| Counter type | FPGA |
| Counters | 8 (quadrature or normal) |
| Counter input modes | Quadrature (x1, x2, x4)/Totalize, Pulse width, Period |
| Mode options | Non-Recycle, Range Limit, Clear on Read, Modulo-N, Up/Down, Decrement |
| Index options | Latch, Clear|Reload, Decrement, Gate; mode dependent. |
| Resolution | 16, 32 or 48-bit counters |
| Quadrature mode input frequency | 10/5/2.5 MHz, max, in x1/x2/x4 |
| Normal mode input frequency | 10 MHz, max |
| De-bounce times | 16 steps from 500 ns to 25 ms; positive or negative edge sensitive; glitch detect mode or de-bounce mode; software-selectable. |
| Time-base and accuracy | 48 MHz (24 MHz – 30 ppm with a 2xDLL (delay locked loop)) |
| Counter read pacer | Internal or external scan pacer up to 8 MHz |
| Period/pulse width resolution | 20.83 ns; 208.3 ns; 2.083 µs; or 20.83 µs |
| Input |
| Receiver type | SN75ALS175 quad differential receiver |
| Configuration | 8 channels. Each channel consists of PhaseA input, PhaseB input and Index input; each input is selectable as single-ended or differential.
Differential: PhaseA, PhaseB and Index (+) inputs at the user connector are routed to the (+) inputs of differential receiver. PhaseA, PhaseB and Index (–) inputs at the user connector are routed to the (–) inputs of the differential receiver. Single-ended: PhaseA, PhaseB and Index (+) inputs at the user connector are routed to the (+) inputs of the differential receiver. PhaseA, PhaseB and Index (–) inputs at the user connector are left floating. The (–) inputs of the differential receiver are routed to the +3 V reference. |
| Common mode input voltage range | ±12 V |
| Differential input voltage range | ±12 V |
| Input sensitivity | ±200 mV |
| Input hysteresis | 50 mV, typ |
| Input impedance | 12 k?, min |
| Absolute maximum input voltage | ±14 V, max |
| Miscellaneous | Meets or exceeds ANSI EIA/TIA-422-B, EIA/TIA-423-B, RS-485. Meets ITU recommendations V.10, V.11, X.26, X.27. Designed for multipoint busses on long lines and in noisy environments. |
| Trigger and pacer |
| Digital type | Edge/level sensitive; software-selectable. |
| Trigger types | Start acquisition process |
| Pacer | Latch counter values for read back |
| Trigger and pacer inputs | Internal (software)External |
| Trigger and pacer input | –0.5 V to 7.0 V |
| External pacer frequency | 8 MHz, max |
| Indicator LEDs |
| Power LED | Indicates that the device’s microcontroller has power and is running. |
| Status LED | Indicates that the USB is configured; blinks to indicate USB traffic. |
| Channel LEDs | Indicates that the encoder/counter is receiving a valid signal on any of the inputs. |
| Environmental |
| Operating temperature range | 0 °C to 60 °C |
| Storage temperature range | –40 °C to 85 °C |
| Humidity | 0% to 90% non-condensing |
| Mechanical |
| Dimensions (L × W × H) | 245 × 146 × 50 mm (9.6 × 5.7 × 2.0 in.) |
| USB specifications |
| Device type USB | 2.0 high-speed mode (480 Mbps) if available (recommended), otherwise, USB 1.1 full-speed mode (12 Mbps) |
| Device compatibility | USB 2.0 (recommended) or USB 1.1 |
| USB cable type | A-B cable, UL type AWM 2725 or equivalent. (min 24 AWG VBUS/GND, min 28 AWG D+/D–) |
| USB cable length | 3 meters, max (9.84 feet) |
| I/O connectors |
| Connector type | Screw terminals: 10 banks; detachable37-pin D type: J12(external) and J50 (internal) |
| Wire gauge range for screw terminals | 16 AWG to 28 AWG |
| Compatible cable with the 37-pin connectors | C37F-4X9F-1M
C37FF-x
C37FFS-x |
| Compatible accessory products with the 37-pin connectors | SCB-37
CIO-MINI37
CIO-MINI37/DST
CIO-MINI37-VERT
CIO-MINI37-VERTDST
CIO-TERMINAL |
